This position is targeting a recent college graduate for a May/June 2024 start date.
At Trident Systems' Space Electronic Systems (SES) division, we believe in the power of using strong engineering principles to drive innovation and solve complex problems. We foster a culture of rigorous engineering and continuous improvement, leveraging the full knowledge of our organization through collaborative development processes that include design and peer reviews. We combine our expertise in space electronics with right-sized development processes to create innovative, high-performance space-based electronic systems that meet our customers' evolving needs.
We are a mission partner supporting DoD, Intelligence, and Civil space customers. We develop complex radiation effects mitigated designs that balance competing requirements in modern space programs, delivering cutting-edge solutions that enable our customers to achieve more in space.
ESSENTIAL FUNCTIONS:
• Work within a multi-discipline team of engineers to design Software Defined Radios (SDRs), On-Board Processors (OBPs) and storage solutions for space applications utilizing the latest Xilinx technologies (e.g., Zynq Ultrascale+ MPSoC, Zynq Ultrascale+ RFSoC, and the VERSAL ACAP)
• Code, simulate, and verify a wide range of RTL modules for FPGAs including modules for digital signal processing (DSP), control algorithms, interfaces to external peripherals, etc.
• Create and maintain comprehensive simulation test bench modules to ensure a high degree of code coverage and verify functionality of firmware modules
• Create and maintain Core Level and Top-Level design documents
• Participate in code reviews, design reviews, and contribute towards FPGA Design methodologies and best practices
• Work in close collaboration with hardware and software engineers throughout the integration process to ensure that FPGA designs are correctly implemented
KNOWLEDGE, SKILLS, AND ABILITIES:
Required:
• A basic understanding of FPGA design methodologies including physical synthesis, static timing analysis, and formal verification
• Some experience working with Xilinx FPGAs and the Vivado Design Suite
• RTL coding experience using VHDL
• Some experience writing simulation testbenches to identify bugs and verify designs
• Must be a highly productive, self-motivated person able to contribute as an individual and work within a distributed team
• Must possess very good communication skills, verbal and written
• Ability to be granted a security clearance
Preferred Experience:
• Vivado IP Integrator
• Modelsim/Questasim and/or Aldec simulation tools
• Simulation verification libraries and tools such as UVVM, UVM, OVM, etc.
• Writing constraints for timing verification
• Digital Signal Processing (DSP)
• Board bring-up/verification in an electronic lab environment
• Familiarity with lab test equipment such as logic analyzers, oscilloscopes, signal generators, spectrum analyzers, etc.
• Revision control systems, such as Git
• MATLAB and Simulink
• MATLAB HDL Coder
• Linux
• C/C++
• Verilog
• SystemVerilog
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